| アイテムタイプ |
学術雑誌論文 = Journal Article(1) |
| 公開日 |
2024-11-05 |
| 資源タイプ |
|
|
資源タイプ識別子 |
http://purl.org/coar/resource_type/c_6501 |
|
資源タイプ |
journal article |
| タイトル |
|
|
タイトル |
Designs of Array Multipliers with an Optimized Delay in Quantum-Dot Cellular Automata |
|
言語 |
en |
| 言語 |
|
|
言語 |
eng |
| 著者 |
Yan, Aibin
Li, Xuehua
Liu, Runqi
Huang, Zhengfeng
Girard, Patrick
温, 暁青
|
| 抄録 |
|
|
内容記述タイプ |
Abstract |
|
内容記述 |
Quantum-dot cellular automata (QCA) has been considered as a novel nano-electronic technology. With the advantages of low power consumption, high speed, and high integration, QCA has been treated as the potential replacement technology of the CMOS (complementary metal oxide semiconductor) which is currently used in the industry. This paper presents a QCA-based array multiplier with an optimized delay. This type of circuit is the basic building block of many arithmetic logic units and electronic communication systems. Compared to the existing array multipliers, the proposed multipliers have the smallest cell count and area. The proposed designs used a compact clock scheme to reduce the carry delay of the signals. The 2 × 2 array multiplier clock delay was reduced by almost 65% compared to the existing designs. Moreover, since the multiplier exhibits a good scalability, for further proof, we proposed a 3 × 3 array multiplier. Simulation results asserted the feasibility of the proposed multipliers. Extensive comparison results demonstrated that when the design scaling was increased, our proposed designs still displayed an efficient overhead in terms of the delay, cell count, and area. The QCADesigner tool was employed to validate the proposed array multipliers. The QCADesigner-E was used to measure the power dissipation of the alternative compared solutions. |
|
言語 |
en |
| 書誌情報 |
en : Electronics
巻 12,
号 14,
p. 3189,
発行日 2023-07-23
|
| 出版社 |
|
|
出版者 |
MDPI |
|
言語 |
en |
| DOI |
|
|
関連タイプ |
isVersionOf |
|
|
識別子タイプ |
DOI |
|
|
関連識別子 |
https://doi.org/10.3390/electronics12143189 |
| ISSN |
|
|
収録物識別子タイプ |
EISSN |
|
収録物識別子 |
2079-9292 |
| 著作権関連情報 |
|
|
権利情報 |
Copyright (c) 2023 by the authors. Licensee MDPI, Basel, Switzerland. |
| 著作権関連情報 |
|
|
権利情報Resource |
https://creativecommons.org/licenses/by/4.0/ |
|
権利情報 |
This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
QCA |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
array multiplier |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
XOR gate |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
full adder |
| 出版タイプ |
|
|
出版タイプ |
VoR |
|
出版タイプResource |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |
| 査読の有無 |
|
|
値 |
yes |
| 研究者情報 |
|
|
URL |
https://hyokadb02.jimu.kyutech.ac.jp/html/300_ja.html |
| 論文ID（連携） |
|
|
値 |
10441921 |
| 連携ID |
|
|
値 |
12425 |
10441921.pdf (1.3 MB)
