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アイテム
Development of Sprite Drawing Hardware Combining High-Level Synthesis and FPGA Internal Memory
http://hdl.handle.net/10228/0002001289
http://hdl.handle.net/10228/00020012898f695d42-7b29-4196-a523-013b51890f72
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
10448093.pdf (1.1 MB)
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| アイテムタイプ | 共通アイテムタイプ(1) | |||||||||||
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| 公開日 | 2025-02-12 | |||||||||||
| タイトル | ||||||||||||
| タイトル | Development of Sprite Drawing Hardware Combining High-Level Synthesis and FPGA Internal Memory | |||||||||||
| 言語 | en | |||||||||||
| 著者 |
Aoki, Keigo
× Aoki, Keigo
× 山脇, 彰
WEKO
3658
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| 著作権関連情報 | ||||||||||||
| 権利情報 | Copyright (c) Owner/Author 2024. This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in IECC '24: Proceedings of the 2024 6th International Electronics Communication Conference, https://doi.org/10.1145/3686625.3686632. | |||||||||||
| 抄録 | ||||||||||||
| 内容記述タイプ | Abstract | |||||||||||
| 内容記述 | Mobile devices are required to have higher performance and more functionality while conserving more power. To realize high-performance and low-power game applications by dynamic hardware reconfiguration on a FPGA equipped with mobile devices, we are developing a hardware-oriented game library so that high-level synthesis can generate efficient hardware automatically. Usually, large images and other data used in games are stored in an external memory instead of hardware internally but loading them from the external memory may be time-consuming. Therefore, this paper proposes a hardware organization to utilize the internal memory in a FPGA to reduce the external memory accesses, and then develops a sprite drawing hardware combines software optimized for high-level synthesis and the internal memory in a FPGA. Through demonstration experiments using an actual device, this paper evaluates the execution time, circuit size, and power efficiency. | |||||||||||
| 言語 | en | |||||||||||
| 備考 | ||||||||||||
| 内容記述タイプ | Other | |||||||||||
| 内容記述 | 2024 6th International Electronics Communication Conference, IECC 2024, July 19 - 21, 2024, Fukuoka Japan | |||||||||||
| 言語 | en | |||||||||||
| 書誌情報 |
en : IECC '24: Proceedings of the 2024 6th International Electronics Communication Conference p. 37-41, 発行日 2024-09-03 |
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| 出版社 | ||||||||||||
| 出版者 | ACM | |||||||||||
| 言語 | ||||||||||||
| 言語 | eng | |||||||||||
| 資源タイプ | ||||||||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||||||||
| 資源タイプ | journal article | |||||||||||
| 出版タイプ | ||||||||||||
| 出版タイプ | AM | |||||||||||
| 出版タイプResource | http://purl.org/coar/version/c_ab4af688f83e57aa | |||||||||||
| DOI | ||||||||||||
| 識別子タイプ | DOI | |||||||||||
| 関連識別子 | https://doi.org/10.1145/3686625.3686632 | |||||||||||
| ISBN | ||||||||||||
| 識別子タイプ | ISBN | |||||||||||
| 関連識別子 | 979-8-4007-1759-8 | |||||||||||
| 会議記述 | ||||||||||||
| 会議名 | 2024 6th International Electronics Communication Conference, IECC 2024 | |||||||||||
| 言語 | en | |||||||||||
| 開始年 | 2024 | |||||||||||
| 開始月 | 07 | |||||||||||
| 開始日 | 19 | |||||||||||
| 終了年 | 2024 | |||||||||||
| 終了月 | 07 | |||||||||||
| 終了日 | 21 | |||||||||||
| 開催国 | JPN | |||||||||||
| 研究者情報 | ||||||||||||
| URL | https://hyokadb02.jimu.kyutech.ac.jp/html/87_ja.html | |||||||||||
| 論文ID（連携） | ||||||||||||
| 値 | 10448093 | |||||||||||
| 連携ID | ||||||||||||
| 値 | 12931 | |||||||||||
