{"created":"2023-05-15T11:55:20.845344+00:00","id":234,"links":{},"metadata":{"_buckets":{"deposit":"d2ec17e9-0e6c-4a65-9d26-eabc0dff50d7"},"_deposit":{"created_by":3,"id":"234","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"234"},"status":"published"},"_oai":{"id":"oai:kyutech.repo.nii.ac.jp:00000234","sets":["17:18"]},"author_link":["1143"],"item_22_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2007-05","bibliographicIssueDateType":"Issued"},"bibliographic_titles":[{}]}]},"item_22_description_5":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"平成17年度~平成18年度科学研究費補助金(基盤研究(c))研究成果報告書","subitem_description_type":"Other"}]},"item_22_publisher_7":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"九州工業大学"}]},"item_22_select_60":{"attribute_name":"査読の有無","attribute_value_mlt":[{"subitem_select_item":"no"}]},"item_22_text_37":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"九州工業大学大学院情報工学研究科"}]},"item_22_text_58":{"attribute_name":"科研課題番号","attribute_value_mlt":[{"subitem_text_value":"17500039"}]},"item_22_text_62":{"attribute_name":"備考","attribute_value_mlt":[{"subitem_text_value":"別刷論文(p8-9,17-20,34-39,41-46,48-59,62-69,82-89,92-97,99-104)削除 / 登録別刷論文(1)Hybrid fault simulation with compiled and event-driven methods. Proc. IEEE Int'1 Conf. on Design & Test of Integrated System in Nanoscale Technology (DTIS), pp.240-243 (2006) © 2006 IEEE / 登録別刷論文(2)A Novel and Practical Control Scheme for Inter-Clock At-Speed Testing. Proc. IEEE Int'1 Test Conf. Paper 17.2 (2006) © 2006 IEEE / 登録別刷論文(3)Low-Capture-Power Test Generation for Scan-Based At-Speed Testing. Proc. IEEE Int'1 Test Conf. Paper 39.2 (2005) © 2006 IEEE"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorAffiliations":[{"affiliationNameIdentifiers":[],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"Wen, Xiaoqing","creatorNameLang":"en"},{"creatorName":"温, 暁青","creatorNameLang":"ja"},{"creatorName":"オン, ギョウセイ","creatorNameLang":"ja-Kana"}],"familyNames":[{},{},{}],"givenNames":[{},{},{}],"nameIdentifiers":[{},{},{},{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2007-12-07"}],"displaytype":"detail","filename":"17500039seika.pdf","filesize":[{"value":"3.0 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"17500039seika.pdf","url":"https://kyutech.repo.nii.ac.jp/record/234/files/17500039seika.pdf"},"version_id":"2db32ee5-23a9-4b92-bfa4-41ced89cdd79"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"LST Testing","subitem_subject_scheme":"Other"},{"subitem_subject":"Power Aware Testing","subitem_subject_scheme":"Other"},{"subitem_subject":"DFT","subitem_subject_scheme":"Other"},{"subitem_subject":"Fault Diagnosis","subitem_subject_scheme":"Other"},{"subitem_subject":"Low Power Testing","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"research report","resourceuri":"http://purl.org/coar/resource_type/c_18ws"}]},"item_title":"LSI歩留まり向上のための誤テスト回避型テスト方式に関する研究","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"LSI歩留まり向上のための誤テスト回避型テスト方式に関する研究"}]},"item_type_id":"22","owner":"3","path":["18"],"pubdate":{"attribute_name":"公開日","attribute_value":"2007-12-07"},"publish_date":"2007-12-07","publish_status":"0","recid":"234","relation_version_is_last":true,"title":["LSI歩留まり向上のための誤テスト回避型テスト方式に関する研究"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-10-25T08:51:25.430542+00:00"}