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On the optimization of heterogeneous MDDs
http://hdl.handle.net/10228/613
http://hdl.handle.net/10228/613e2ab7a2f-3e01-417c-85b5-0e947a8f3007
| 名前 / ファイル | ライセンス | アクション |
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IEEETCAD2005_nagayama.pdf (579.6 kB)
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| アイテムタイプ | 学術雑誌論文 = Journal Article(1) | |||||
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| 公開日 | 2008-01-08 | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
| 資源タイプ | journal article | |||||
| タイトル | ||||||
| タイトル | On the optimization of heterogeneous MDDs | |||||
| 言語 | en | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 著者 |
Nagayama, Shinobu
× Nagayama, Shinobu× 笹尾, 勤 |
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| 抄録 | ||||||
| 内容記述タイプ | Abstract | |||||
| 内容記述 | This paper proposes minimization algorithms for the memory size and the average path length (APL) of heterogeneous multivalued decision diagrams (MDDs). In a heterogeneous MDD, each multivalued variable can take different domains. To represent a binary logic function using a heterogeneous MDD, we partition the binary variables into groups with different numbers of binary variables and treat the groups as multivalued variables. Since memory size and APL of a heterogeneous MDD depend on the partition of binary variables as well as the ordering of binary variables, the memory size and the APL of a heterogeneous MDD can be minimized by considering both orderings and partitions of binary variables. The experimental results show that heterogeneous MDDs can represent logic functions with smaller memory sizes than free binary decision diagrams (FBDDs) and smaller APLs than reduced ordered BDDs (ROBDDs); the APLs of heterogeneous MDDs can be reduced by half of the ROBDDs without increasing memory size; and heterogeneous MDDs have smaller area-time complexities than MDD(k)s. | |||||
| 言語 | en | |||||
| 書誌情報 |
en : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 巻 24, 号 11, p. 1645-1659, 発行日 2005-10-24 |
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| 出版社 | ||||||
| 出版者 | Institute of Electrical and Electronics Engineers | |||||
| DOI | ||||||
| 関連タイプ | isIdenticalTo | |||||
| 識別子タイプ | DOI | |||||
| 関連識別子 | https://doi.org/10.1109/TCAD.2005.852290 | |||||
| 日本十進分類法 | ||||||
| 主題Scheme | NDC | |||||
| 主題 | 548 | |||||
| NCID | ||||||
| 収録物識別子タイプ | NCID | |||||
| 収録物識別子 | AA10629136 | |||||
| ISSN | ||||||
| 収録物識別子タイプ | PISSN | |||||
| 収録物識別子 | 0278-0070 | |||||
| ISSN | ||||||
| 収録物識別子タイプ | EISSN | |||||
| 収録物識別子 | 1937-4151 | |||||
| 著作権関連情報 | ||||||
| 権利情報 | ©2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | Area–time complexity | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | average path length (APL) | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | FBDD | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | heterogeneous MDD | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | logic simulation | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | memory size | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | representation of logic functions | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | ROBDD | |||||
| 出版タイプ | ||||||
| 出版タイプ | VoR | |||||
| 出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
| 査読の有無 | ||||||
| 値 | yes | |||||
