@inproceedings{oai:kyutech.repo.nii.ac.jp:00005169,
 author = {Sato, Yasuo and Kajihara, Seiji and 梶原, 誠司 and Yamaguchi, Hisato and Matsuzono, Makoto},
 book = {Asian Test Symposium (ATS), 2011 IEEE 20th},
 month = {Dec},
 note = {Field test for reliability is usually performed with small amount of memory resource, and it requires a new technique which might be somewhat different from the conventional manufacturing tests. This paper proposes a novel technique that improves fault coverage or reduces the number of test vectors that is needed for achieving the given fault coverage on scan-based BIST structure. We evaluate a multi-cycle test method that observes the values of partial flip-flops on a chip during capture-mode. The experimental result shows that the partial observation achieves fault coverage improvement with small hardware overhead than the full observation., 2011 Asian Test Symposium (ATS), 20-23 Nov. 2011, New Delhi, India},
 pages = {54--59},
 publisher = {IEEE},
 title = {Multi-Cycle Test with Partial Observation on Scan-Based BIST Structure},
 year = {2011},
 yomi = {カジハラ, セイジ}
}