WEKO3
アイテム
Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores
http://hdl.handle.net/10228/00007574
http://hdl.handle.net/10228/0000757422e503c2-6ee4-455b-9535-ffa6e76a55c6
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
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| アイテムタイプ | 学術雑誌論文 = Journal Article(1) | |||||
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| 公開日 | 2020-01-28 | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
| 資源タイプ | journal article | |||||
| タイトル | ||||||
| タイトル | Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores | |||||
| 言語 | en | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 著者 |
Han, Yinhe
× Han, Yinhe× Hu, Yu× Li, Xiaowei× Li, Huawei× Chandra, Anshuman× 温, 暁青 |
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| 抄録 | ||||||
| 内容記述タイプ | Abstract | |||||
| 内容記述 | Connection of internal scan chains in core wrapper design (CWD) is necessary to handle the width match of TAM and internal scan chains. However, conventional serial connection of internal scan chains incurs power and time penalty. Study shows that the distribution and high density of don't care bits (X-bits) in test patterns make scan slices overlapping and partial overlapping possible. A novel parallel CWD (pCWD) approach is presented in this paper for lowering test power by shortening wrapper scan chains and adjusting test patterns. In order to achieve shift time reduction from overlapping in pCWD, a two-phase process on test pattern: partition and fill, is presented. Experimental results on d695 of ITC2002 benchmark demonstrated the shift time and test power have been decreased by 1.5 and 15 times, respectively. In addition, the proposed pCWD can be used as a stand-alone time reduction technique, which has better performance than previous techniques. | |||||
| 言語 | en | |||||
| 書誌情報 |
en : IEICE Transactions on Information and Systems 巻 E88-D, 号 9, p. 2126-2134, 発行日 2005-09-01 |
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| 出版社 | ||||||
| 出版者 | 電子情報通信学会 | |||||
| 言語 | ja | |||||
| DOI | ||||||
| 関連タイプ | isIdenticalTo | |||||
| 識別子タイプ | DOI | |||||
| 関連識別子 | https://doi.org/10.1093/ietisy/e88-d.9.2126 | |||||
| NCID | ||||||
| 収録物識別子タイプ | NCID | |||||
| 収録物識別子 | AA10826272 | |||||
| ISSN | ||||||
| 収録物識別子タイプ | PISSN | |||||
| 収録物識別子 | 0916-8532 | |||||
| ISSN | ||||||
| 収録物識別子タイプ | EISSN | |||||
| 収録物識別子 | 1745-1361 | |||||
| 著作権関連情報 | ||||||
| 権利情報 | Copyright (c) 2005 The Institute of Electronics, Information and Communication Engineers | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | SOC testing | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | wrapper design | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | scan slices | |||||
| キーワード | ||||||
| 主題Scheme | Other | |||||
| 主題 | overlapping | |||||
| 出版タイプ | ||||||
| 出版タイプ | VoR | |||||
| 出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
| 査読の有無 | ||||||
| 値 | yes | |||||
| 研究者情報 | ||||||
| URL | https://hyokadb02.jimu.kyutech.ac.jp/html/300_ja.html | |||||
| 論文ID(連携) | ||||||
| 値 | 10029817 | |||||
| 連携ID | ||||||
| 値 | 8081 | |||||