{"created":"2023-05-15T11:59:47.137693+00:00","id":6375,"links":{},"metadata":{"_buckets":{"deposit":"2157f1cf-7f43-4cd1-aee5-df96164eab30"},"_deposit":{"created_by":3,"id":"6375","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"6375"},"status":"published"},"_oai":{"id":"oai:kyutech.repo.nii.ac.jp:00006375","sets":["8:24"]},"author_link":["26595","1147","26593","26596","26588","26594","6567","26087","1143"],"item_21_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2016-03-03","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"108","bibliographicPageStart":"103","bibliographic_titles":[{"bibliographic_title":"2015 IEEE 24th Asian Test Symposium (ATS)"}]}]},"item_21_description_4":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"IR-drop induced by launch switching activity (LSA) in capture mode during at-speed scan testing increases delay along not only logic paths (LPs) but also clock paths (Cps). Excessive extra delay along LPs compromises test yields due to false capture failures, while excessive extra delay along CPs compromises test quality due to test clock stretch. This paper is the first to mitigate the impact of LSA on both LPs and CPs with a novel LCPA (Logic/Clock Path-Aware) at-speed scan test generation scheme, featuring (1) a new metric for assessing the risk of false capture failures based on the amount of LSA around both LPs and CPs, (2) a procedure for avoiding false capture failures by reducing LSA around LPs or masking uncertain test responses, and (3) a procedure for reducing test clock stretch by reducing LSA around CPs. Experimental results demonstrate the effectiveness of the LCPA scheme in improving test yields and test quality.","subitem_description_type":"Abstract"}]},"item_21_description_5":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"2015 IEEE 24th Asian Test Symposium (ATS), 22-25 November 2015, Mumbai, India","subitem_description_type":"Other"}]},"item_21_description_60":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"subitem_description":"Journal Article","subitem_description_type":"Other"}]},"item_21_link_62":{"attribute_name":"研究者情報","attribute_value_mlt":[{"subitem_link_url":"https://hyokadb02.jimu.kyutech.ac.jp/html/300_ja.html"}]},"item_21_publisher_7":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"IEEE"}]},"item_21_relation_12":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"info:doi/10.1109/ATS.2015.25","subitem_relation_type_select":"DOI"}}]},"item_21_relation_14":{"attribute_name":"情報源","attribute_value_mlt":[{"subitem_relation_name":[{"subitem_relation_name_text":"DOI: 10.1109/ATS.2015.25"}],"subitem_relation_type_id":{"subitem_relation_type_id_text":"DOI: 10.1109/ATS.2015.25","subitem_relation_type_select":"URI"}}]},"item_21_relation_9":{"attribute_name":"ISBN","attribute_value_mlt":[{"subitem_relation_type_id":{"subitem_relation_type_id_text":"978-1-4673-9739-1","subitem_relation_type_select":"ISBN"}}]},"item_21_rights_13":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"Copyright (c) 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works."}]},"item_21_select_59":{"attribute_name":"査読の有無","attribute_value_mlt":[{"subitem_select_item":"yes"}]},"item_21_source_id_8":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2377-5386","subitem_source_identifier_type":"ISSN"}]},"item_21_subject_16":{"attribute_name":"日本十進分類法","attribute_value_mlt":[{"subitem_subject":"548","subitem_subject_scheme":"NDC"}]},"item_21_text_28":{"attribute_name":"論文ID（連携）","attribute_value_mlt":[{"subitem_text_value":"10286851"}]},"item_21_text_36":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Kyushu Institute of Technology, Iizuka, 820-8502, Japan"},{"subitem_text_value":"Kyushu Institute of Technology, Iizuka, 820-8502, Japan"},{"subitem_text_value":"Kyushu Institute of Technology, Iizuka, 820-8502, Japan"},{"subitem_text_value":"Kyushu Institute of Technology, Iizuka, 820-8502, Japan"},{"subitem_text_value":"Kyushu Institute of Technology, Iizuka, 820-8502, Japan"},{"subitem_text_value":"University of Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany"},{"subitem_text_value":"University of Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany"},{"subitem_text_value":"University of Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany"},{"subitem_text_value":"Advanced Micro Devices, Inc., Sunnyvale, CA 94088, USA"}]},"item_21_text_63":{"attribute_name":"連携ID","attribute_value_mlt":[{"subitem_text_value":"8096"}]},"item_21_version_type_58":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_ab4af688f83e57aa","subitem_version_type":"AM"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Asada,  K."}],"nameIdentifiers":[{}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[],"affiliationNames":[{"affiliationName":""}]}],"creatorNames":[{"creatorName":"Wen, Xiaoqing","creatorNameLang":"en"},{"creatorName":"温, 暁青","creatorNameLang":"ja"},{"creatorName":"オン, ギョウセイ","creatorNameLang":"ja-Kana"}],"familyNames":[{},{},{}],"givenNames":[{},{},{}],"nameIdentifiers":[{},{},{},{}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[],"affiliationNames":[{"affiliationName":""}]}],"creatorNames":[{"creatorName":"Holst, Stefan","creatorNameLang":"en"},{"creatorName":"ホルスト, シュテファン","creatorNameLang":"ja"}],"familyNames":[{},{}],"givenNames":[{},{}],"nameIdentifiers":[{},{},{}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[],"affiliationNames":[{"affiliationName":""}]}],"creatorNames":[{"creatorName":"Miyase, Kohei","creatorNameLang":"en"},{"creatorName":"宮瀬, 紘平","creatorNameLang":"ja"},{"creatorName":"ミヤセ, コウヘイ","creatorNameLang":"ja-Kana"}],"familyNames":[{},{},{}],"givenNames":[{},{},{}],"nameIdentifiers":[{},{},{},{}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[],"affiliationNames":[{"affiliationName":""}]}],"creatorNames":[{"creatorName":"Kajihara, Seiji","creatorNameLang":"en"},{"creatorName":"梶原, 誠司","creatorNameLang":"ja"},{"creatorName":"カジハラ, セイジ","creatorNameLang":"ja-Kana"}],"familyNames":[{},{},{}],"givenNames":[{},{},{}],"nameIdentifiers":[{},{},{},{}]},{"creatorNames":[{"creatorName":"Kochte,  M. A."}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Schneider,  E."}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Wunderlich,  H.-J."}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Qian,  J."}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-01-31"}],"displaytype":"detail","filename":"10286851.pdf","filesize":[{"value":"764.7 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"10286851.pdf","url":"https://kyutech.repo.nii.ac.jp/record/6375/files/10286851.pdf"},"version_id":"d26c7512-5e73-4d58-a7a4-8b90f73716c8"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"launch switching activity","subitem_subject_scheme":"Other"},{"subitem_subject":"IR-drop","subitem_subject_scheme":"Other"},{"subitem_subject":"logic path","subitem_subject_scheme":"Other"},{"subitem_subject":"clock path","subitem_subject_scheme":"Other"},{"subitem_subject":"false capture failure","subitem_subject_scheme":"Other"},{"subitem_subject":"test clock stretch","subitem_subject_scheme":"Other"},{"subitem_subject":"X-filling","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch"}]},"item_type_id":"21","owner":"3","path":["24"],"pubdate":{"attribute_name":"公開日","attribute_value":"2020-01-31"},"publish_date":"2020-01-31","publish_status":"0","recid":"6375","relation_version_is_last":true,"title":["Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-10-25T09:01:55.961558+00:00"}