@article{oai:kyutech.repo.nii.ac.jp:00006382,
 author = {Wen, Xiaoqing and 温, 暁青 and Miyase, Kohei and 宮瀬, 紘平 and Kajihara, Seiji and 梶原, 誠司 and Furukawa,  H. and Yamato,  Y. and Takashima,  A. and Noda,  K. and Ito,  H. and Hatayama,  K. and Aikyo,  T. and Saluja,  K. K.},
 journal = {2008 13th European Test Symposium},
 month = {Jul},
 note = {Capture-safety, defined as the avoidance of any timing error due to unduly high launch switching activity in capture mode during at-speed scan testing, is critical for avoiding test- induced yield loss. Although point techniques are available for reducing capture IR-drop, there is a lack of complete capture-safe test generation flows. The paper addresses this problem by proposing a novel and practical capture-safe test generation scheme, featuring (1) reliable capture-safety checking and (2) effective capture-safety improvement by combining X-bit identification & X-filling with low launch- switching-activity test generation. This scheme is compatible with existing ATPG flows, and achieves capture-safety with no changes in the circuit-under-test or the clocking scheme., 2008 13th European Test Symposium, 25-29 May 2008, Verbania, Italy},
 pages = {55--60},
 title = {A Capture-Safe Test Generation Scheme for At-Speed Scan Testing},
 year = {2008},
 yomi = {オン, ギョウセイ and ミヤセ, コウヘイ and カジハラ, セイジ}
}