@article{oai:kyutech.repo.nii.ac.jp:00006414,
 author = {Wen, Xiaoqing and 温, 暁青},
 journal = {2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)},
 month = {Aug},
 note = {Low-power VLSI circuits are indispensable for almost all types of modern electronic devices, from battery-driven mobile gadgets to harvested-energy-driven wireless sensor systems. However, the testing of such low-power VLSI circuits has become a big challenge, especially due to the excessive power dissipation during scan testing. This paper will highlight three major test-power-induced problems (namely heat, false failures, clock stretch) and describe how to mitigate them with power-aware VLSI testing. Future research topics in this field will also be discussed., 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT-2016), 25-28 October 2016, Hangzhou, China},
 pages = {585--588},
 title = {Power-Aware Testing For Low-Power VLSI Circuits},
 year = {2017},
 yomi = {オン, ギョウセイ}
}