{"created":"2023-05-15T12:00:02.413736+00:00","id":6699,"links":{},"metadata":{"_buckets":{"deposit":"2962ed50-4071-4b39-ab6e-8c6c32f537f2"},"_deposit":{"created_by":3,"id":"6699","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"6699"},"status":"published"},"_oai":{"id":"oai:kyutech.repo.nii.ac.jp:00006699","sets":["8:24"]},"author_link":["16176","28355","28354"],"item_21_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2018-09-30","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"509","bibliographicPageStart":"505","bibliographicVolumeNumber":"88-90","bibliographic_titles":[{"bibliographic_title":"Microelectronics Reliability"}]}]},"item_21_description_4":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"Parallel connected power devices such as Insulated Gate Bipolar Transistors (IGBTs) can be used to realize a system with higher current and higher power rating. However, the operation of parallel connected IGBTs is prone to unbalancing due to variation in parameters of the semiconductor devices and asymmetric parallel system. In this paper, feedback control is proposed for peak overshoot minimization as well as current balancing of parallel connected IGBTs. A fully digital feedback control (DFC) is implemented using the universal clock for balanced operation of the two parallel connected IGBTs.","subitem_description_type":"Abstract"}]},"item_21_description_60":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"subitem_description":"Journal Article","subitem_description_type":"Other"}]},"item_21_publisher_7":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Elsevier"}]},"item_21_relation_12":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"https://doi.org/10.1016/j.microrel.2018.06.030","subitem_relation_type_select":"DOI"}}]},"item_21_rights_13":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"Copyright (c) 2018 Elsevier Ltd."}]},"item_21_select_59":{"attribute_name":"査読の有無","attribute_value_mlt":[{"subitem_select_item":"yes"}]},"item_21_source_id_10":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11538014","subitem_source_identifier_type":"NCID"}]},"item_21_source_id_8":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0026-2714","subitem_source_identifier_type":"ISSN"}]},"item_21_subject_16":{"attribute_name":"日本十進分類法","attribute_value_mlt":[{"subitem_subject":"541","subitem_subject_scheme":"NDC"}]},"item_21_text_36":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Next Generation Power Electronics Research Centre, Kyushu Inst. of Tech., Kitakyushu 808-0196, Japan"},{"subitem_text_value":"Green Electronics Research Institute Kitakyushu (GRIK), Kitakyushu 808-0135, Japan"},{"subitem_text_value":"Next Generation Power Electronics Research Centre, Kyushu Inst. of Tech., Kitakyushu 808-0196, Japan"}]},"item_21_text_63":{"attribute_name":"連携ID","attribute_value_mlt":[{"subitem_text_value":"7484"}]},"item_21_version_type_58":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_ab4af688f83e57aa","subitem_version_type":"AM"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Tripathi,  R.N."}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Tsukuda,  M."}],"nameIdentifiers":[{}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[],"affiliationNames":[{"affiliationName":""}]}],"creatorNames":[{"creatorName":"Omura, Ichiro","creatorNameLang":"en"},{"creatorName":"大村, 一郎","creatorNameLang":"ja"},{"creatorName":"オオムラ, イチロウ","creatorNameLang":"ja-Kana"}],"familyNames":[{},{},{}],"givenNames":[{},{},{}],"nameIdentifiers":[{},{},{},{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-09-30"}],"displaytype":"detail","filename":"nperc111.pdf","filesize":[{"value":"870.8 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"nperc111.pdf","url":"https://kyutech.repo.nii.ac.jp/record/6699/files/nperc111.pdf"},"version_id":"0deeec00-5623-4621-8231-a0074a5c1635"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"Parallel connection","subitem_subject_scheme":"Other"},{"subitem_subject":"Power devices","subitem_subject_scheme":"Other"},{"subitem_subject":"IGBT","subitem_subject_scheme":"Other"},{"subitem_subject":"Digital feedback control","subitem_subject_scheme":"Other"},{"subitem_subject":"Current balancing","subitem_subject_scheme":"Other"},{"subitem_subject":"Peak minimization","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"A fully digital feedback control of gate driver for current balancing of parallel connected power devices","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"A fully digital feedback control of gate driver for current balancing of parallel connected power devices"}]},"item_type_id":"21","owner":"3","path":["24"],"pubdate":{"attribute_name":"公開日","attribute_value":"2020-09-30"},"publish_date":"2020-09-30","publish_status":"0","recid":"6699","relation_version_is_last":true,"title":["A fully digital feedback control of gate driver for current balancing of parallel connected power devices"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-10-25T10:48:51.919068+00:00"}